| 摘要 |
PURPOSE:To perform the optimum processing in response to the contents of abnormality by keeping an abnormal cycle under a waiting state when a fault occurs in a multi-processor system and informing the detection of the abnormality to another processor by the hardware with use of an interruption signal. CONSTITUTION:A multi-processor contains a memory 5 which is shared by at least >=2 central processing units CPU, e.g., CPU 1 and 2. When either one of both CPU 1 and 2 gives an access to the memory 5, a waiting state is applied to said CPU. When a memory abnormality detecting circuit 6 which checks the errors of the memory 5 detects an error, this detected error is informed to the other CPU. Thus it is possible to progress an error state when a fault occurs and to improve the reliability of a multi-processor system.
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