| 摘要 |
PURPOSE:To reduce a difference of a transfer characteristic due to a position of a logical input terminal, by constituting the titled circuit so that a threshold characteristic being difference by a series connection sequence is averaged at every composite active element. CONSTITUTION:By nine pieces of (p) channel MOS transistors TR Mp11-Mp33, three pieces of composite (p) channel MOS TRs Mp1, Mp2 and Mp3 are constituted equivalently. In this state, Mp11-Mp22-Mp33 being equivalent to the TR Mp1, Mp21-Mp32-Mp13 being equivalent to Mp2, and Mp31-Mp12-Mp23 being equivalent to Mp3 are brought to ON and OFF separately, by a logical input from a terminal A, a logical input from a terminal B, and a logical input from a terminal C, respectively. In such a way, a threshold characteristic of each MOS TR being different by a series connection sequence is averaged at being composite MOS TR Mp1, Mp2 and Mp3. Accordingly, a difference of a transfer characteristic due to a position of the logical input terminals A, B and C can be reduced.
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