发明名称 INTERFACE CONTROL SYSTEM
摘要 PURPOSE:To realize a driving current of small power by providing an inverting circuit for inverting the logic of N bit data when a combination of a logical state of the N bit data exceeds N/2, so that a driving current of an output interface always goes to <=1/2, comparing the result when N bits are all driven. CONSTITUTION:In case of sending out data in which the number of bits of a logical state '1' of N bit data A1-An exceeds N/2, an inversion instructing signal 1a becomes '1', therefore, a logical state of all bits is inverted by an exclusive OR gate of an inverting circuit 2, and data B1-Bn are outputted to the outside through an output driver 4. Also, in case of sending out data in which the number of bits of the logical state '1' of the N bit data A1-An is below N/2, the inversion instructing signal 1a goes to '0', therefore, a logical inversion is not executed by the inverting circuit 2, and the data B1-Bn are outputted to the outside through the output driver 4 as they are. In such a way, comparing the result when the N bit data have all been driven, it will suffice that a driving current is always <=1/2, therefore, small power thereof can be realized.
申请公布号 JPH0241515(A) 申请公布日期 1990.02.09
申请号 JP19880193808 申请日期 1988.08.02
申请人 NEC CORP 发明人 OGAWA HIROSHI
分类号 G06F3/00;G06F13/36;H04L25/02 主分类号 G06F3/00
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