发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To control independently the rise time and the fall time of a CMOS logic circuit by inserting variable resistance elements controlled from mutually independent external terminals, in an power supply route and a grounding route of the CMOS logic circuit. CONSTITUTION:An internal inverter circuit is constituted of a CMOS inverter circuit, N-channel or P-channel MOS Tr 3 and Tr 4. In the CMOS inverter circuit, gates of a P-channel MOS Tr 1 and an N-channel MOS transistor Tr 2 are mutually connected, and drains of the transistors are mutually connected. The above node-points are made the logic input and the logic output, respectively. The MOS Tr 3 and Tr 4 are inserted, respectively, in the power supply side and the grounding side of the CMOS inverter circuit. The Tr 3 and the Tr 4 are used as variable resistance elements, and the gates of them are connected with the external input terminals 5 and 6, respectively. By voltages independently applied to the external input terminals 5, 6, characteristics of the rise time and the fall time of output voltage can be independently controlled.</p>
申请公布号 JPH0240948(A) 申请公布日期 1990.02.09
申请号 JP19880191327 申请日期 1988.07.30
申请人 NEC CORP;NEC ENG LTD 发明人 HARASAWA AKIO;UCHIUMI KENICHI
分类号 H01L21/8238;H01L27/092;H03K5/13;H03K19/0948 主分类号 H01L21/8238
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