发明名称 LOOP BACK CONTROL SYSTEM
摘要 <p>PURPOSE:To enable communication by loop back control independently of distinct of master station or slave station by incorporating a buffer memory circuit in a loop back circuit and holding the subordinate synchronization of an inter- network clock. CONSTITUTION:The communication between a master station equipment 1 and a slave station equipment 2 is implemented normally through transmission lines 4-1, 4-2 and loop back circuits 3-1, 3-2 reflect respectively a reception signal to an opposite equipment at the time of loop back instruction. When the slave station equipment 2 receives a loop back instruction and the loop back circuit 3-2 is active, the loop back circuit 3-2 writes the reception signal in a buffer memory according to a subordinate clock from the master station equipment 1, read out by an output clock of the slave station equipment 2 and sent to an opposite equipment as a transmission signal. Moreover, the operation of the loop back circuit 3-1 of the master station equipment 1 is similar to above, the reception signal from the slave station equipment 2 is written in the buffer memory of the loop back circuit 3-1, read out by a transmission clock of the master station equipment 1 and folded to the slave station equipment 2.</p>
申请公布号 JPH0282834(A) 申请公布日期 1990.03.23
申请号 JP19880233684 申请日期 1988.09.20
申请人 NEC CORP 发明人 DOUMORI NORITOSHI
分类号 H04L7/00 主分类号 H04L7/00
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