| 摘要 |
The apparatus includes a circuit (2) for generating two n-bit syndromes corresponding to the received signal, a circuit (4) for converting the two n-bit syndromes to a 2n-bit syndrome, a random error correcting circuit (7), a burst error correcting circuit (5), two combining circuits (11a, 11b) and output selecting circuit (6). The circuit (7) inputs the two n-bit syndromes and outputs a random error correction signal to one of the combining circuits (11a) and the circuit (5) inputs the 2n-bit syndrome and outputs a burst error correction signal to the other of the combining circuits (11b). The combining circuits combine the correction signals to the received BCH code signal. The output selecting circuit (6) selectively outputs one of the combined signals in accordance with the decoding conditions of the error correcting circuits (5, 7) and the result of comparison between the decoded and error-corrected signals.
<IMAGE> |
