| 摘要 |
PURPOSE:To attain the micronization of a circuit without decreasing the operating speed by providing MOS transistors(TRs) where the voltage of a power source supplied to P-channel MOS TR and N-channel MOS TR is reduced by a threshold voltage than the power supply voltage of the power source. CONSTITUTION:A drain voltage (node N1) of P-channel MOS TRs MP1, MP2 is fluctuated only in a range between VD and VT, and a drain voltage (nodes N2, N3) of N-channel MOS TRs MN1, MN3 is fluctuated only in a range between a ground level and VD-VT1 (a threshold voltage of the node N2 with respect to the substrate by taking the application of bias into account). That is, the power supply voltage supplied to N-channel MOS TR circuit sections 2A, 2B is the maximum of VD-VT1 and the power supply voltage supplied to P-channel MOS TR circuit section 1 is the maximum of VD-VT1. Thus, the micronization of the circuit is attained without decreasing the operating speed. |
