发明名称 |
VERFAHREN ZUR UEBERTRAGUNG VON DATEN. |
摘要 |
A multiprocessor system has a bidirectional bus serviing modules. One module initiates the data transfer and another is a receiver. Another unit is used solely as a transmitter and another as a receiver. For the transmitter module a min. configuration is used comprising a control unit lock generator and a multiplexer. The contorl unit is the form of a microprocessor together with ROMs and RAMs. The bus system has a capacity for 20 transmitter and receiver modules.
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申请公布号 |
DE3776784(D1) |
申请公布日期 |
1992.03.26 |
申请号 |
DE19873776784 |
申请日期 |
1987.10.24 |
申请人 |
FORCE COMPUTERS GMBH, 8012 OTTOBRUNN, DE |
发明人 |
JAEKEL, HANS-JUERGEN, W-8025 UNTERHACHING, DE |
分类号 |
G06F13/42;G06F15/16;H04L1/16;H04L12/18;(IPC1-7):G06F13/42 |
主分类号 |
G06F13/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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