| 摘要 |
Buffer memory circuit, in particular for sonar, with digital output, containing elements of integrated operating memory of RAM type, coupled to a controlling circuit and to a write/read tick generator, characterized in that it consists of an analogue-digital converter (1) connected at the analogue input to a digital sonar receiver and at the digital input to the first output of a known controlling circuit (2) whose digital output is connected to the first pair of contacts (3.1) of the electronic switch (3) of a multi-contact demultiplexer, this pair being connected respectively to a known primary memory block (4), preferably having a first integral address counter (5), and to a known secondary memory block (6), preferably having a second integral address counter (7), in such a way that to the second pair of contacts (3.2) of the electronic switch of the multiplexer (3) are connected the outputs, respectively, of the primary memory block (4) and the secondary memory block (6), which depending on the position of this pair of contacts constitute a data output to the sonar microcomputer, while the third double pair of contacts (3.3) of the electronic switch (3) is connected on one side to the output of the read tick generator (8), on the second side to the output from the sonar microcomputer in the read tick line, and on the third side, depending on its position, to the first address counter (5) and second address counter.....<IMAGE>
|
