| 摘要 |
PURPOSE:To prevent separation of an upper layer metallic pattern at an electrode pad, by forming a via-hole in a region covered with a protective coat instead of in a region right below the electrode pad. CONSTITUTION:An inter-layer insulation film 4 is deposited over a lower layer conductor pattern 3 by means of the plasma CVD, and the like. A via-hole 5 is formed in the film using a photolithographic technique. Filling the hole with tungsten constitutes a tungsten layer 51. An upper layer metallic pattern 6 is deposited over the film by means of, e.g. a sputtering, and undergoes patterning. The surface of a chip is covered with a protective coat 7 consisting of, e.g. an SiON film. An opening hole 71 is formed at an area for wire bonding where a connection is established with an external component, employing the photolithographic technique. This opening hole 71 is positioned so as not to be located over the via-hole 5, which is an interconnection between the upper layer 6 and the lower layer 3 of the metallic patterns. The absence of the via- hole 5 right below the electrode pad 61 prevents, at the electrode pad 61, the separation between the upper layer metallic pattern 6 and the tungsten layer 51. |
