| 摘要 |
PURPOSE: To provide a compact arithmetic and logic computing element by including plural logic circuits connected with a word line and a bit line, and realizing arithmetic and logic computing functions by those logic circuits. CONSTITUTION: A functioning block 41 and next functioning blocks 42 and 43 are included, and can be selected by impressing a proper logical level to word lines WLN-WNL+3 for bits N, N+1, and N-1 and bit lines B and the inverse of B. Than, the functioning block 41 includes memory cells 45-48 and arithmetic and logic computing function cells 49-60, and the arithmetic and logic computing function is executed for the bit N of an operand. Also, the functioning blocks 42 and 43 include the memory cells and the arithmetic and logic computing function cells for the bits N+1 and N-1 of the operand. Therefore, the arithmetic and logic computing element includes M functioning blocks for the operand of a word line size M, and each block is operated for one bit of the operand. |
