发明名称 |
Semiconductor memory device and manufacturing method thereof |
摘要 |
Disclosed is a semiconductor memory device having such a structure that a voltage variation on a bit line does not affect a voltage on another bit line. A gate electrode portion branches and extends laterally from a word line and extends almost in parallel with the bit line. First and second impurity regions of a field effect transistor are formed on regions between adjacent word lines, with the gate electrode portion therebetween. A capacitor electrically connected to the second impurity region is formed to cover the bit lines. Since the capacitor is between adjacent bit lines, no voltage variation on one bit line affects a voltage on the other bit lines.
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申请公布号 |
US5177575(A) |
申请公布日期 |
1993.01.05 |
申请号 |
US19900622074 |
申请日期 |
1990.12.04 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
IKEDA, YUTAKA |
分类号 |
H01L27/04;G11C7/18;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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