BASIC LAYOUT METHOD OF TRANSISTOR,申请号JP19920002163-传众专利搜索

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发明名称	BASIC LAYOUT METHOD OF TRANSISTOR
摘要
申请公布号	JPH05190814(A)	申请公布日期	1993.07.30
申请号	JP19920002163	申请日期	1992.01.09
申请人	FUJITSU LTD	发明人	SATO SHINJI
分类号	H01L27/118;H01L21/768;H01L21/82;H01L21/822;H01L27/04	主分类号	H01L27/118
代理机构		代理人
主权项
地址

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