| 摘要 |
The load resistor of SRAM cell is mfd. by (a) forming a field oxide film (2), a gate (4) and a source/drain region on the fixed region of the semiconductor substrate, (b) depositing a low temp. oxide film (5), and selectively etching the fixed part to form a butting contact region (A), (C) depositing a doped interconnection polysilicon (15), and forming a first oxide film barrier (16) of at most 100 angstroms and an intrinsic polysilicon of at most 1 μm on the polysilicon (15), (d) patterning the polysilicons (8,15) and the barrier (16) to make a load resistor pattern, and to form a load resistor of the polysilicon (8), (e) forming a side wall spacer (18) on the side surface of the pattern, (f) forming a second oxide film barrier (17) of at most 100 angstroms, and (g) depositing a second interconnection polysilicon (15) on the whole surface, and patterning it to make a fixed pattern.
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