发明名称 |
METHOD OF CONTROLLING A INPUT CLOCK SELECTING |
摘要 |
The method for controlling input clock select comprises the first step (10) for receiving state information of input/output on all built-in assemblies, the second step (20) for selecting waiting input clock by using select information of input clock in before state, the third step (30) for selecting main input clock to select several same clocks, the fourth step (40) for selecting optimum clocks for the built-in assemblies by using main input clock data and waiting input clock data.
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申请公布号 |
KR930008727(B1) |
申请公布日期 |
1993.09.13 |
申请号 |
KR19900020837 |
申请日期 |
1990.12.17 |
申请人 |
KOREA TELECOMMUNICATIONS CORP.;KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
KIM, OK - HUI;LEE, JONG - HUI;LEE, CHANG - MUN |
分类号 |
H04Q11/00;(IPC1-7):H04Q11/00 |
主分类号 |
H04Q11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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