发明名称
摘要 PURPOSE:To calculate correctly an addres of an exception generating instruction even at the time of a parallel execution, by storing an entry number of a register stack corresponding to an arithmetic unit which has generated arithmetic exception information, in an instruction stack read register. CONSTITUTION:At every instruction executing indication, the execution time required for each arithmetic and arithmetic units 2-4 are stored in a register stack 5 of the same entry number, and also, in an instruction stack register of the same entry number, an instruction address of its arithmetic is stored. In response to an instructing indication of each arithmetic, count-down of the execution time is started, and when it reaches a prescribed value and the end of arithmetic is detected, arithmetic exception generating information of the units 2-4 which have ended the arithmetic is selected and stored in an exception generating information register 13, and also the entry number of the corresponding stack 5 is stored in an instruction stack read register 15. When an arithmetic exception is generated, the contents of the register 14 remain held thereafter, as well, and from an instruction address stack 11, the address of the instruction which has generated the arithmetic exception remains read out.
申请公布号 JPH0580691(B2) 申请公布日期 1993.11.10
申请号 JP19850140966 申请日期 1985.06.27
申请人 NIPPON ELECTRIC CO 发明人 HAYASHI HIDEO
分类号 G06F9/38;G06F7/38;G06F7/527;G06F11/00;G06F11/14 主分类号 G06F9/38
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