发明名称 Mixed-scale electronic interface and fabrication method
摘要 A mixed-scale electronic interface, included in integrated circuits and other electronic devices, provides for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer (302,308) and nanoscale features of a predominantly nanoscale layer (307,313). The predominantly nanoscale layer comprises a tessellated pattern of submicroscale or microscale pads (306,312) densely interconnected by nanowire junctions (318) between sets of parallel, closely spaced nanowire bundles (314,316), each pad having two opposite edges from which two nanowires emanate in opposite directions along a respective one of the opposite edges. The predominantly submicroscale or microscale layer includes pins (304-310) positioned complementarily to the submicroscale or microscale pads (306,312) in the predominantly nanoscale layer. A method of manufacturing such mixed scale interface includes fabricating, by nanoimprinting, first and second sublayers of pad-interconnected nanowire units.
申请公布号 EP2096672(A2) 申请公布日期 2009.09.02
申请号 EP20090006878 申请日期 2007.01.26
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 SNIDER, GREGORY S.;WILLIAMS, STANLEY R.
分类号 H01L27/00 主分类号 H01L27/00
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