发明名称 Microcomputer logic development device
摘要 A microcomputer logic development device realizing high speed sampling RAM monitoring by connecting an existing RAM measurement device, provided with a first block providing functions corresponding to a microcomputer core, a second block having functions corresponding to microcomputer resources, a bus connecting the first and second blocks, and a RAM measurement block provided with a common memory, connected with the bus and RAM measurement device, and realizing a RAM monitor function with respect to the first block, the RAM measurement block realizing a high speed RAM monitoring operation by dividing the timing for processing between the first block and common memory and the timing for processing between the common memory and RAM measurement device.
申请公布号 US7577560(B2) 申请公布日期 2009.08.18
申请号 US20040884636 申请日期 2004.07.02
申请人 FUJITSU TEN LIMITED 发明人 IMADA SHOUGO;KANOU KOUICHI;HIGUCHI TAKASHI
分类号 F02D45/00;G06F9/455;G06F9/44;G06F11/00;G06F11/22;G06F11/28;G06F11/30;G06F13/10;G06F13/12;G06F17/50 主分类号 F02D45/00
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