发明名称 Localized spacer for a multi-gate transistor
摘要 In one embodiment, the present invention includes a double gate transistor having a silicon fin formed on a buried oxide layer and first and second insulation layers formed on a portion of the silicon fin, where at least the second insulation layer has a pair of portions extending onto respective first and second portions of the silicon fin to each act as a self-aligned spacer structure. Other embodiments are described and claimed.
申请公布号 US7575976(B2) 申请公布日期 2009.08.18
申请号 US20070729033 申请日期 2007.03.28
申请人 INTEL CORPORATION 发明人 BAN IBRAHIM;SHAH UDAY
分类号 H01L21/336 主分类号 H01L21/336
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