发明名称 |
STACKED PACKAGE ELEMENT, METHOD FOR FORMING TERMINAL OF STACKED PACKAGE ELEMENT, STACKED PACKAGE, AND METHOD FOR FORMING STACKED PACKAGE |
摘要 |
To provide a semiconductor chip module having high degree of freedom in the assignment of circuit to each semiconductor chip and in the position of connection terminal of each semiconductor chip. A semiconductor chip is provided, on the side face thereof, with a part of connection terminals coupled with a circuit pattern formed on the front face. A plurality of the semiconductor chips are stacked and bonded to produce a semiconductor chip module. The connection terminal portions on the side face of the semiconductor chips are interconnected by a wiring pattern. The connection terminals on the semiconductor chip are led from the front face to the side face and formed by spraying a mist of a conductive material. ® KIPO & WIPO 2009 |
申请公布号 |
KR20090087449(A) |
申请公布日期 |
2009.08.17 |
申请号 |
KR20097010096 |
申请日期 |
2007.03.20 |
申请人 |
KABUSHIKI KAISHA NIHON MICRONICS |
发明人 |
IKEDA MASATO |
分类号 |
H01L23/20;H01L21/288;H01L23/12;H01L23/18 |
主分类号 |
H01L23/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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