发明名称 FREQUENCY DIVIDING CIRCUIT AND FREQUENCY DIVIDING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a frequency dividing circuit and frequency dividing method capable of synchronizing all frequency divided signals and outputting the frequency divided signals synchronized with the same edge of a clock signal in signals frequency-divided by a plurality of stages of 1/2 frequency dividers. <P>SOLUTION: A first synchronizing circuit group includes a second synchronizing circuit group which is provided between a frequency divider group and the first synchronizing circuit group and constituted of N stages of latch circuits inputting thereto frequency-divided signals from the frequency divider groups and connecting outputs thereof to input terminals of latch circuits in the first synchronizing circuit group, inputs clock signals to clock input terminals of latch circuits from the first stage to an M<SP>th</SP>stage, outputs signals synchronized to the clock signals, inputs an output signal of the latch circuit on the M<SP>th</SP>stage to clock input terminals of latch circuits from an (M+1)<SP>th</SP>stage to an N<SP>th</SP>stage, and outputs a signal synchronized to the output of the latch circuit on the M<SP>th</SP>stage. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009165064(A) 申请公布日期 2009.07.23
申请号 JP20080003009 申请日期 2008.01.10
申请人 NEC CORP 发明人 SHOJI TAKASHI
分类号 H03K23/40;G06F1/10;H03K21/00;H03K21/12 主分类号 H03K23/40
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