发明名称 NONVOLATILE MEMORY AND MICROCOMPUTER
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce a maximum value of a substrate current in an erasing operation of a nonvolatile memory. <P>SOLUTION: This nonvolatile memory (2) is composed so that a plurality of nonvolatile memory cells are arranged in the arrayed state, each of which has a source electrode (53) and drain electrode (54) formed on a semiconductor substrate (30), a charge trap layer (52) formed on the semiconductor substrate between the source electrode and drain electrode, and a gate electrode (50) arranged on the charge trap layer. The nonvolatile memory is equipped with a control circuit (33) having an erasing mode for applying a voltage required for the erasure to the source electrode and the gate electrode. In this erasing mode, a period (63) after the voltage application to the gate electrode is started until the voltage of the gate electrode attains a predetermined voltage required for erasing, is settled to be longer than a period (64) after the voltage application to the source electrode is started until the voltage of the source electrode attains a predetermined voltage. Thus, the maximum value of the substrate current in the erasing operation is suppressed. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009163829(A) 申请公布日期 2009.07.23
申请号 JP20080001232 申请日期 2008.01.08
申请人 RENESAS TECHNOLOGY CORP 发明人 SHIOTANI KENICHI;ARIKANE TAKESHI
分类号 G11C16/02;G11C16/04;G11C16/06;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/02
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