METHOD, DEVICE, AND PROGRAM FOR DESIGNING SEMICONDUCTOR

摘要

PROBLEM TO BE SOLVED: To design a power domain where a restoration time from power shut-off is short and a circuit scale is suppressed. SOLUTION: A circuit insertion position extraction part 13 defines an output branch point as a node in a signal path between an FF on an N-th step and an FF on an (N-1)-th step from an output side boundary of the power domain. In a node model based on the definition, a node is added so that the number of nodes on all the signal paths from each FF on the N-th step to each FF on the (N-1)-th step becomes identical and the node model is updated. Then, in the updated node model, nodes disposed at a position to be the same number of node steps seen from each FF on the N-th step or (N-1)-th step are counted, and the output side of the node corresponding to the number of node steps where there are fewest nodes is extracted as a position to insert a data latch circuit provided with a function to hold an input signal value immediately before the power is shut off. COPYRIGHT: (C)2009,JPO&INPIT