发明名称 DESIGN DEVICE FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGN METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To perform high-precision IDDQ calculation while taking into account in-chip variations for each parameter of leak factors of Tr. SOLUTION: Leakage current values of respective parameters are calculated based upon variation distribution average values for each condition through weighting by correlation (correlation value) between in-chip variation data or a distribution model of respective parameters of leakage current factors of transistors Tr alone and IDDQ values of the respective parameters, and an IDDQ value of the whole LSI is calculated to calculate the IDDQ value with high-precision. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009164241(A) 申请公布日期 2009.07.23
申请号 JP20070340249 申请日期 2007.12.28
申请人 PANASONIC CORP 发明人 MATSUI MITSUKIYO
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
代理机构 代理人
主权项
地址