| 摘要 |
A semiconductor device having the present high withstand voltage power device IGBT has at a back surface a p collector layer with boron injected in an amount of approximately 3x1013/cm2 with an energy of approximately 50 KeV to a depth of approximately 0.5 mum, and an n+ buffer layer with phosphorus injected in an amount of approximately 3x1012/cm2 with an energy of 120 KeV to a depth of approximately 20 mum. To control lifetime, a semiconductor substrate is exposed to protons at the back surface. Optimally, it is exposed to protons at a dose of approximately 1x1011/cm2 to a depth of approximately 32 mum as measured from the back surface. Thus snapback phenomenon can be eliminated and an improved low saturation voltage (Vce (sat))-offset voltage (Eoff) tradeoff can be achieved.
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