发明名称 Large area electronic device with high and low resolution patterned film features
摘要 <p>Two different processing techniques are utilized to respectively form high resolution features and low resolution features in a critical layer of an electronic device, and in particular a large area electronic device. High resolution features are formed by soft lithography, and low resolution features are formed by jet-printing or using a jet-printed etch mask. Jet-printing is also used to stitch misaligned structures. Alignment marks are generated with the features to coordinate the various processing steps and to automatically control the stitching process. Thin-film transistors are formed by generating gate structures using a first jet-printed etch mask, forming source/drain electrodes using soft lithography, forming interconnect structures using a second jet-printed etch mask, and then depositing semiconductor material over the source/drain electrodes. Redundant structures are formed to further improve tolerance to misalignment, with non-optimally positioned structures removed (etched) during formation of the low resolution interconnect structures. </p>
申请公布号 EP1672717(A3) 申请公布日期 2009.07.22
申请号 EP20050112386 申请日期 2005.12.19
申请人 PALO ALTO RESEARCH CENTER INCORPORATED 发明人 STREET, ROBERT A.;WONG, WILLIAM S.;CHABINYC, MICHAEL L.;SALLEO, ALBERTO
分类号 H01L51/40 主分类号 H01L51/40
代理机构 代理人
主权项
地址