发明名称 Reduced barrier photodiode / gate device structure for high efficiency charge transfer and reduced lag and method of formation
摘要 A pixel cell having a reduced potential barrier near a region where a gate and a photodiode are in close proximity to one another, and a method for forming the same are disclosed. Embodiments of the invention provide a pixel cell comprising a substrate. A gate of a transistor is formed at least partially below the surface of the substrate and a photodiode is adjacent to the gate. The photodiode comprises a doped surface layer of a first conductivity type, and a doped region of a second conductivity type underlying the doped surface layer. The doped surface layer is at least partially above a level of the bottom of the gate.
申请公布号 US7563631(B2) 申请公布日期 2009.07.21
申请号 US20060582373 申请日期 2006.10.18
申请人 发明人
分类号 H01L21/00 主分类号 H01L21/00
代理机构 代理人
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