发明名称 Integration scheme for Cu/low-k interconnects
摘要 A semiconductor structure having an opening formed in a porous dielectric layer is provided. The exposed pores of the dielectric layer along the sidewalls of the opening are sealed. The sealing may comprise a selective or a non-selective deposition method. The sealing layer has a substantially uniform thickness in one portion of the opening and a non-uniform thickness in another portion of the opening. A damascene interconnect structure having a pore sealing layer is provided as is its method of manufacture.
申请公布号 US7564136(B2) 申请公布日期 2009.07.21
申请号 US20060361331 申请日期 2006.02.24
申请人 发明人
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
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