发明名称 Decoder circuit
摘要 A decoder circuit that selects a grayscale voltage responsive to digital input includes a first transistor circuit that selects grayscale voltages greater than a certain voltage and a second transistor circuit that selects grayscale voltages less than the certain voltage. The two transistor circuits are formed in separate substrates, one substrate being a well formed in the other substrate, or both substrates being wells formed in a third substrate. The substrate of the first transistor circuit is biased at a higher potential than the substrate of the second transistor circuit. This biasing scheme enables all selected grayscale voltages to propagate quickly through the decoder circuit.
申请公布号 US7564392(B2) 申请公布日期 2009.07.21
申请号 US20080138674 申请日期 2008.06.13
申请人 OKI SEMICONDUCTOR CO., LTD. 发明人 TAKABAYASHI YASUTAKA
分类号 H03M1/76 主分类号 H03M1/76
代理机构 代理人
主权项
地址