发明名称 |
FLEXIBLE MULTI-VALUED HALF ADDER USING SINGLE ELECTRON LOGIC DEVICE |
摘要 |
A convertible multi-valued half adder using a single-electron logic device is provided to increase the degree of integration by reducing the number of devices for constructing a half subtractor by 5. A single-electron logic device and a field effect transistor are formed in series to perform the SUM operation. 2 single-electron logic devices and the field effect transistor are formed parallel to perform the CARRY operation. A half adder circuit is formed by connecting an input gate 1 for the SUM operation with an input gate 1 for the CARRY operation, and connecting an input gate 2 for the SUM operation with an input gate 2 for the CARRY operation. The half adder circuit is formed by applying a voltage one of control gates A, B(33,34) of the CARRY operation.
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申请公布号 |
KR20090054499(A) |
申请公布日期 |
2009.06.01 |
申请号 |
KR20070121194 |
申请日期 |
2007.11.27 |
申请人 |
CHUNGBUK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION |
发明人 |
CHOI, JUNG BUM;KIM, SANG JIN;LEE, CHANG KEUN |
分类号 |
G06F7/501;G06F7/00 |
主分类号 |
G06F7/501 |
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