发明名称 Method of inspecting semiconductor circuit having logic circuit as inspection circuit
摘要 A semiconductor circuit includes an inspection circuit for inspecting terminal open of the semiconductor circuit. The semiconductor circuit has a plurality of input terminals. The semiconductor circuit includes an input circuit portion connected to the plurality of input terminals. The inspection circuit includes a logic circuit, supplied with a plurality of input signals from the input circuit portion, for performing a predetermined logic operation to the plurality of input signals to produce a logic operation result. Whereby the semiconductor circuit enables to decide the presence or absence of the terminal open on the basis of the logic operation result.
申请公布号 US2009096476(A1) 申请公布日期 2009.04.16
申请号 US20080285597 申请日期 2008.10.09
申请人 ELPIDA MEMORY, INC. 发明人 KOYAMA TAKAHIRO
分类号 G01R31/02;H03K19/00 主分类号 G01R31/02
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