发明名称 REPROGRAMMABLE BUILT-IN-SELF-TEST INTEGRATED CIRCUIT AND TEST METHOD FOR THE SAME
摘要 The present invention discloses a reprogrammable built-in-self-test integrated circuit and a test method for the same, wherein test programs are directly stored in the application program memory of the logic chip of a SoC IC, and an external test apparatus is used to load the test programs into the application program memory via a serial transmission interface, and an application CPU is used to read and execute the test programs to perform the bonding-wire connectivity between the logic chip and the memory chip. In the present invention, test vectors can still be flexibly revised after tapeout to increase test coverage. As the test programs are directly stored in the existing application program memory without using additional memory space, and as the test programs are executed by the existing application CPU without using an extra built-in-self-test circuit, the present invention can effectively reduce test cost.
申请公布号 US2009100305(A1) 申请公布日期 2009.04.16
申请号 US20070870242 申请日期 2007.10.10
申请人 JAN HSUN-YAO;SU TING-HAN;YANG CHENG-FANG 发明人 JAN HSUN-YAO;SU TING-HAN;YANG CHENG-FANG
分类号 G01R31/28 主分类号 G01R31/28
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