发明名称 METHOD OF MAKING AN INTEGRATED CIRCUIT BY MODIFYING A DESIGN LAYOUT
摘要 An original layout of an integrated circuit is modified using optical proximity correction (OPC) to obtain a second layout. During OPC, a sensitivity to flare for each feature is conveniently identified (2). To map (4) the flare, the amplitude of intensity is mapped over a field of exposure, which is typically a rectangle-shaped area corresponding to an exposure of a stepper. The field of exposure is divided into regions in which a region is characterized as having substantially the same amplitude throughout. For each feature a decision (14) is made whether to make a further correction or not. If correction is desired, the amount of correction is based in part on the region in which the feature is located and the sensitivity of the feature. This same approach is applicable to other properties than flare that vary based on the location within the field of exposure.
申请公布号 WO2006096232(A3) 申请公布日期 2009.04.16
申请号 WO2006US00612 申请日期 2006.01.10
申请人 FREESCALE SEMICONDUCTOR, INC.;LUCAS, KEVIN, D.;BOONE, ROBERT, E.;PATTERSON, KYLE, W. 发明人 LUCAS, KEVIN, D.;BOONE, ROBERT, E.;PATTERSON, KYLE, W.
分类号 G06F17/50 主分类号 G06F17/50
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