发明名称 |
Method to Form CMOS Circuits Using Optimized Sidewalls |
摘要 |
A method of forming reduced width STI field oxide elements using sidewall spacers on the isolation hardmask to reduce the STI trench width is disclosed. The isolation sidewall spacers are formed by depositing a conformal layer of spacer material on the isolation hardmask and performing an anisotropic etch. The isolation sidewall spacers reduce the exposed substrate width during the subsequent STI trench etch process, leading to a reduced STI trench width. A method of forming the isolation sidewall spacers of a material that is easily removed from the isolation hardmask to provide an exposed shoulder width on the substrate defined by the sidewall thickness is also disclosed.
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申请公布号 |
US2009098702(A1) |
申请公布日期 |
2009.04.16 |
申请号 |
US20080253095 |
申请日期 |
2008.10.16 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
KIRKPATRICK BRIAN K.;XIONG WEIZE;PRINS STEVEN L. |
分类号 |
H01L21/336;H01L21/762 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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