| 摘要 |
A laminate chip device is provided to protect an inner circuit from an over voltage and a static electricity by coupling a varistor device and various devices. A laminate chip device includes a plurality of laminate sheets(10,20,30,40,50) and a resistance pattern(70). The laminate sheets include conductive patterns(11,21,31,41,51). A first ground pattern is formed on a first laminate sheet. A plurality of first internal electrodes is formed on a second laminate sheet. A second ground pattern is formed on a third laminate sheet. A plurality of second internal electrodes is formed on a fourth laminate sheet. A third ground pattern is formed on a fifth laminate sheet. The first internal electrode is connected to a first external terminal electrode(81). The first ground pattern, the second ground pattern, and the third ground pattern are connected to a second external terminal electrode(82). The second internal electrode is connected to a third external terminal electrode(83). The ground pattern is extended to one surface of the laminate sheet, and includes at least one protrusion pattern.
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