发明名称 |
A/D CONVERTER AND READING CIRCUIT |
摘要 |
An A/D converter 11 performs multiple-times sampling on a first signal S1 in a first period T1 while performing multiple-times sampling on a second signal S2 in a second period T2. An A/D converter circuit 17 provides a digital signal in response to a signal from an output 15b of a gain stage 15 in the second period T2. The digital signal may have a value "1" or a value "0". The A/D converter circuit 17 includes a circuit 18 providing a signal S A/DM corresponding to the number of times the value "1" appears. A switch 24 operates in response to a clock signal Õs and is used to sample a signal from a pixel 2a. In a first capacitor circuit 27, a switch 29 and a capacitor 31 are connected to an inverting input 23a and a non-inverting output 23b, respectively. The switch 29 operates in response to a clock signal Õ3 and is used for integration in the capacitor 31.
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申请公布号 |
EP2048785(A1) |
申请公布日期 |
2009.04.15 |
申请号 |
EP20070791671 |
申请日期 |
2007.07.31 |
申请人 |
NATIONAL UNIVERSITY CORPORATION SHIZUOKA UNIVERSITY |
发明人 |
KAWAHITO, SHOJI |
分类号 |
H03M1/12;H03M1/18;H04N5/217;H04N5/357;H04N5/378 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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