| 摘要 |
A method for inspecting a critical dimension of a semiconductor device is provided to perform a weak point review of a layout of a semiconductor IC chip by accurately matching a mask critical dimension and a wafer critical dimension in proportion to a simulation result in a manufacturing process of the semiconductor IC chip. A tilt value of each point is calculated in a graph of an intensity value of a semiconductor chip pattern. A weak point of each pattern process is calculated based on the tilt value. An optical parameter of a pattern of the semiconductor device is obtained by a simulation. A weak point inside the pattern is classified by using the optical parameter of the pattern of the semiconductor device. The weak point is classified according to a pattern type. A representative pattern is set according to the pattern type. A coordinate of the semiconductor layout of the representative pattern is outputted. The coordinate is reflected in a critical dimension inspection in a mask manufacture or a wafer process.
|
