INTEGRATED CIRCUIT COMPRISING A SECURE TEST MODE USING INTEGRATED CIRCUIT CONFIGURABLE CELL CHAIN STATUS DETECTION,申请号EP20060743720-传众专利搜索

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发明名称	INTEGRATED CIRCUIT COMPRISING A SECURE TEST MODE USING INTEGRATED CIRCUIT CONFIGURABLE CELL CHAIN STATUS DETECTION
摘要
申请公布号	EP1877811(B1)	申请公布日期	2009.04.15
申请号	EP20060743720	申请日期	2006.04.21
申请人	STMICROELECTRONICS SA	发明人	BANCEL, FREDERIC;HELY, DAVID
分类号	G01R31/317;G01R31/3185	主分类号	G01R31/317
代理机构		代理人
主权项
地址

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