| 摘要 |
A semiconductor memory device is provided to increase the area margin and the high integration by reducing the number of transistors within the sub-word line drivers. A row decoder(10) produces the sub word line enable signal(swen(1:8)) of 8 and the main word line enable signal(mwen) by decoding the row address(add_row(1:n)) of the n bit. A main word line driver(20) delivers the main word line enable signal to the main word line(M_WL). Each of 8 sub-word line drivers(30) activates the sub word line (S_WL(1:8)) of 8 in response to the sub word line enable signals of 8. |
