发明名称 |
System and method for providing a decimal multiply algorithm using a double adder |
摘要 |
A system for performing decimal multiplication including input registers for inputting a multiplier and a multiplicand. The multiplier includes one or more digits. The system also includes one or more two cycle adders and mechanism. The mechanism receives the multiplier and the multiplicand into the input registers. A running sum is reset to zero. The mechanism also performs for each of the digits in the multiplier in order from least significant digit to most significant digit: creating a partial product of the digit and the multiplicand; and adding the partial product to the running sum using the two cycle adders. When the loop is completed for each of the digits in the multiplier, the mechanism outputs the running sum as the result.
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申请公布号 |
US7519647(B2) |
申请公布日期 |
2009.04.14 |
申请号 |
US20050054567 |
申请日期 |
2005.02.09 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CARLOUGH STEVEN R.;LI WEN H.;SCHWARZ ERIC M. |
分类号 |
G06F7/496 |
主分类号 |
G06F7/496 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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