| 摘要 |
The present invention provides an apparatus and method for performing cryptographic operations on a plurality of input data blocks within a processor, where the size of the input data blocks is programmable. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes fetch logic and execution logic. The fetch logic is disposed within a microprocessor and is configured to receive a cryptographic instruction single atomic cryptographic instruction as part of an instruction flow executing on the microprocessor. The cryptographic instructionsingle atomic cryptographic instruction prescribes one of the cryptographic operations, and also one of a plurality of data block sizes. The execution logic is disposed within the microprocessor and is operatively coupled to the single atomic cryptographic instruction. The execution logic executes the one of the cryptographic operations. The execution logic has a block size controller that employs the one of a plurality of data block sizes during execution of the one of the cryptographic operations.
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