| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a phase-locked loop circuit which is capable of operating over a wide frequency range and reducing a gain of a voltage controlled oscillator. <P>SOLUTION: A phase-locked loop circuit includes a phase difference detector (101) for detecting a phase difference between a reference clock signal and a feedback clock signal; a capacitor (117) for holding a control voltage; a charge pump circuit (102) for connecting the capacitor to a power supply voltage or a reference potential according to the detected phase difference; and a voltage controlled oscillator (104) which generates an output clock signal of an oscillation frequency corresponding to the control voltage and outputs, to the phase difference detector, the output clock signal or a signal corresponding to the output clock signal as the feedback clock signal, wherein the voltage controlled oscillator includes four stages of differential ring oscillators (131-134) and a first exclusive OR (EXOR) circuit (127) which outputs an EXOR signal of clock signals outputted on different stages of the four stages of differential ring oscillators. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
