ARRANGEMENT OF SEMICONDUCTOR CHIPS IN A MULTILAYER FLOOR COVERING

摘要

The invention relates to an arrangement of chips (10) bonded with sensors (7) in a multilayer floor covering. In order further to improve an arrangement of the type under consideration herein, in a simpler way of technical production, the invention proposes that in a first upper layer (1) circuit paths (4) are formed, separated from each other in a plane, to provide power to a chip (10), that a second middle layer (2) is provided in which the chip (10) is located, and that a third lower layer (3) is provided which likewise is connected electrically to the chip (10), wherein sensors (7) are located in the surface gaps between the chips (10).