SEMICONDUCTOR MEMORY DEVICE

摘要

A semiconductor device operating at a high frequency without increasing an area by hierarchically organizing signal lines in the semiconductor device without adding any latch circuit. A semiconductor memory device has hierarchical bit lines each made up of a plurality of hierarchies. Each of the hierarchical bit lines is provided with a circuit for outputting the signal matched to a signal received at input by a charge or discharge which responds to a timing pulse signal. Out of the hierarchies, a sense amplifier and a plurality of memory cells are connected to the first hierarchical bit line and the circuit of the first hierarchical bit line outputs the signal received at the input to the input of the circuit of the second hierarchy next to the first hierarchy in response to a first timing pulse signal and the circuit of the second hierarchy outputs the signal received at the input to the input of the circuit of the third hierarchy in response to a second timing pulse signal. The first timing pulse signal is defined on the basis of the first effective edge of a clock and the second timing pulse signal is defined on the basis of the second effective edge of the clock.