发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To achieve an ESD protection performance having a high ESD withstand voltage and in a small layout area. SOLUTION: An ESD protection circuit 8 includes a clamping circuit 9, Zener diodes 10 and 11, a transistor 12 includes a DMOS, a transistor 13 including an IGBT and resistors 14 and 15. The ESD protection circuit 8 of the configuration efficiently protects a circuit to be protected by absorbing current noise, when the circuit to be protected is operated by the transistor 12, including the DMOS to prevent malfunctions due to latchup of the current noise and operating the IGBT (the transistor 13) of high-current absorption capacity by the thyristor effect with respect to a larger current during ESD. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010278188(A) 申请公布日期 2010.12.09
申请号 JP20090128612 申请日期 2009.05.28
申请人 RENESAS ELECTRONICS CORP 发明人 HAYASHI YUTAKA
分类号 H01L21/822;H01L27/04;H01L27/06 主分类号 H01L21/822
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