A nonvolatile floating gate analog memory cell (1) comprising a transistor having a source (2) and drain (3) formed inside a substrate or on an insulator body (not shown) and separated by a channel (4). The memory cell comprises at least one floating gate (5) formed on one side of the source and drain. (6) is a control gate formed on one side of the floating gate and connected to a first voltage (7). (8) is a back gate formed on the other side of the source and drain and connected to a second voltage (9). The channel is separated from the floating gate and the back gate by an insulation layer (10). The control gate is separated from the floating gate by an insulation layer (11) and the source and drain are isolated from the back gate, control gate and floating gate(s) by a spacer (12). The second voltage changes the intrinsic threshold voltage linearly during programming so that the programmed threshold voltage corresponds to the second voltage.
申请公布号
WO2010046922(A3)
申请公布日期
2010.12.09
申请号
WO2009IN00568
申请日期
2009.10.09
申请人
INDIAN INSTITUTE OF TECHNOLOGY, BOMBAY;SHRIVATSAVA, MAYANK;SHOJAEI, BAGHINI, MARYAM;SHARMA, DINESH, KUMAR;RAO, RAMGOPAL