发明名称 METHOD OF INTERCONNECT CHECKING AND VERIFICATION FOR MULTIPLE ELECTROSTATIC DISCHARGE SPECIFICATIONS
摘要 PURPOSE: A method for designing a semiconductor device circuit and a recording media of the same are provided to improve the rigidity of the circuit by being designing according to the predicted intensity of electrostatic discharge. CONSTITUTION: Two or more electrostatic discharge models are selected(12). The voltage condition, the current condition, and the pulse condition of the electrostatic discharge models are selected(14). Electric connection which is easy to be damaged due to electrostatic discharge is confirmed(16). Elements for improving the robustness with respect to the electrostatic discharge is regulated(20). Electric connectivity between electrostatic discharge network and a signal pad is authenticated(22).
申请公布号 KR20100129196(A) 申请公布日期 2010.12.08
申请号 KR20100049457 申请日期 2010.05.27
申请人 INTERSIL AMERICAS INC. 发明人 STEVEN H. VLODMAN
分类号 H01L23/60 主分类号 H01L23/60
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