发明名称 Low jitter CMOS to CML converter
摘要 The present invention provides a low jitter CMOS to CML converter, including: a differential circuit including differential pair transistors, a pair of loads and a biased transistor, each differential transistor of the differential pair transistors having an input terminal, an output terminal and a connection terminal. With the current compensation device, an additional current path may be provided for the current of the biased transistor which is used as a constant current source when the differential transistors are turned off, so that the peak tail current in the biased transistor current may be eliminated. Thus, the problem caused by the tail current that the common mode output voltages of the converter is unstable and has a high jitter may be solved.
申请公布号 US7847591(B2) 申请公布日期 2010.12.07
申请号 US20090391100 申请日期 2009.02.23
申请人 SEMICONDUCTOR MANUFACTURING (SHANGHAI) CORPORATION 发明人 YU QIANYU;YANG JOSH CHIACHI;LIU HAO
分类号 H03K19/0175;H03K19/094 主分类号 H03K19/0175
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