发明名称 Non-volatile memory cell array and logic
摘要 A semiconductor device comprising a memory region including one or more transistor string arrays, a logic region including one or more logic transistors and an isolation region for isolating the logic transistors. The string array includes a plurality, T, of bipolar junction transistors. The string array includes a common collector region for the T bipolar junction transistors, a common base region for the T bipolar junction transistors, a plurality of emitters, one emitter for each of the T bipolar junction transistors, a number, B, of base contacts for the T bipolar junction transistors where the base contacts electrically couple the common base region and where the number of base contacts, B, is less than the number of transistors, T.
申请公布号 US7847374(B1) 申请公布日期 2010.12.07
申请号 US20080168448 申请日期 2008.07.07
申请人 WANG CHIH-HSIN 发明人 WANG CHIH-HSIN
分类号 H01L29/73 主分类号 H01L29/73
代理机构 代理人
主权项
地址