发明名称 |
Semiconductor memory device |
摘要 |
A word control circuit activates word lines corresponding to a start row address and a next row address overlappingly in the continuous mode. Accordingly, even in the case where the start address indicates an end memory cell connected to a word line, the switching operation of the word line becomes unnecessary. Memory cells connected to different word lines can be thus accessed in a sequential manner. That is, a controller accessing a semiconductor memory device can access the memory without data interruption. This can prevent the data transfer rate from lowering. Furthermore, it is made unnecessary to form a signal and a control circuit for informing a controller of the fact that a word line is being switched so that the construction of a semiconductor memory device and a control circuit of the controller can be simplified. This results in reduction of the system cost.
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申请公布号 |
US7848176(B2) |
申请公布日期 |
2010.12.07 |
申请号 |
US20090428828 |
申请日期 |
2009.04.23 |
申请人 |
FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
IKEDA HITOSHI;FUJIOKA SHINYA;SAWAMURA TAKAHIRO |
分类号 |
G11C8/00;G11C7/10;G11C8/08;G11C11/407;G11C11/4076;G11C11/408 |
主分类号 |
G11C8/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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